Shortages of a key chip packaging technology are constraining the supply of some processors, Taiwan Semiconductor Manufacturing Co. Ltd. chair Mark Liu has revealed. 

Liu made the remarks during a Wednesday interview with Nikkei Asia on the sidelines of SEMICON Taiwan, a chip industry event. The executive said that the supply shortage will likely take 18 months to resolve.

Historically, processors were implemented as a single piece of silicon. Today, many of the most advanced chips on the market comprise not one but multiple semiconductor dies that are manufactured separately and linked together later. One of the technologies most commonly used to link dies together is known as CoWoS.

Liu detailed that demand for CoWoS has tripled over the past year. As a result, TSMC is finding it more challenging to keep up with customer orders. “Currently, we can’t fulfill 100% of our customers’ needs, but we try to support about 80%,” Liu told Nikkei Asia.

TSMC uses CoWoS technology to make, among other products, Nvidia Corp.’s flagship H100 graphics card. The chip is currently in short supply. According to Quartz, some server manufacturers have had to wait six months for their H100 chips to arrive. 

CoWoS technology also underpins Nvidia’s previous flagship graphics card, the A100. Though it doesn’t offer the same performance as the H100, the A100 is likewise in high demand. TSMC is the exclusive manufacturer of both GPUs. 

A CoWoS-based chip can include upwards of a dozen semiconductor dies, each of which performs a different task. Some of the dies store the transistors that carry out computations. Others hold auxiliary components that perform tasks such as ingesting the data sent to the chip for processing.

The dies in such a chip must constantly exchange information with one another to coordinate their calculations, which is where CoWoS technology comes into the picture. The technology provides a channel through which a processor’s modules can send data to one another at high speed. 

The main component of CoWoS is a piece of silicon called an interposer. It contains tiny wires that allow data to travel between a chip’s semiconductor dies. The interposer is placed beneath the semiconductor dies during manufacturing, which means it essentially functions as the chip’s base layer. 

Some chips use a version of the technology called an active interposer. An active interposer contains not only wires for transferring data between a chip’s dies, but also transistors that actively optimize the flow of information. Those transistors can speed up data transfers and thereby increase the chip’s performance. 

Liu told Nikkei Asia that he expects the shortage of CoWoS to end within 18 months. TSMC is currently building a new facility in Miaoli, Taiwan that will increase its chip packaging manufacturing capacity. The project is expected to cost $2.9 billion.

Besides expanding its manufacturing capacity, TSMC is also investing in research and development. Earlier this year, the company detailed that it’s working on a new version of its CoWoS technology called CoWoS-L. It will allow TSMC customers to include more transistors in their chips and thereby speed up processing.

The fact that a CoWoS-based chip’s semiconductor dies sit atop its interposer limits engineers’ ability to increase performance. If the interposer has an area of two square inches, then the semiconductor dies can’t take up three square inches. TSMC’s new CoWoS-L technology makes it possible to increase the size of the interposer, which will allow customers to create larger processors with more transistors. 

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